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詳細資料ISBN：9780321547996 叢書系列：大學電子 規格：平裝 / 624頁 / 普通級/ 單色印刷 / 初版 出版地：台灣 內容簡介 DIGITAL VLSI CHIP DESIGN WITH CADENCE AND SYNOPSYS CAD TOOLS LEADS STUDENTS THROUGH THE COMPLETE PROCESS OF BUILDING A READY-TO-FABRICATE CMOS INTEGRATED CIRCUIT USING POPULAR COMMERCIAL DESIGN SOFTWARE. DETAILED TUTORIALS INCLUDE STEP-BY-STEP INSTRUCTIONS AND SCREEN SHOTS OF TOOL WINDOWS AND DIALOG BOXES. THIS HANDS-ON BOOK IS FOR USE IN CONJUNCTION WITH A PRIMARY TEXTBOOK ON DIGITAL VLSI. |
| Google搜尋參考資料: 1. Digital VLSI Chip Design with Cadence and Synopsys CAD Tools May 11, 2011 ... NEW as of May 2011 - I have begun updating the text for the IC v6 tools from Cadence. That's still ongoing. But, while that's going on, I have ... 2. Digital VLSI Chip Design with Cadence and Synopsys CAD Tools ... Digital VLSI Chip Design with Cadence and Synopsys CAD Tools [Erik Brunvand] on Amazon.com. *FREE* shipping on qualifying offers. KEY BENEFIT: This ... 3. CMOS VLSI Design Lab 1: Cell Design and Verification practicalities of chip design using industry-standard CAD tools from Cadence ... Erik Brunvand's book, Digital VLSI Chip Design with Cadence and Synopsys ... 4. Digital VLSI Chip Design with Cadence and Synopsys CAD Tools ... Digital VLSI Chip Design with Cadence and Synopsys CAD Tools,Erik Brunvand,9780321547996,978-0-3215-4799-6,0-321-54799-3,0321547993 ... 5. Digital VLSI Chip Design with Cadence and Synopsys CAD Tools Feb 25, 2009 ... Digital VLSI Chip Design with Cadence and Synopsys CAD Tools leads students through the complete process of building a ready-to-fabricate ... |
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